MIME-Version: 1.0 Received: from AM4PR07MB1298.eurprd07.prod.outlook.com (10.164.81.156) by DB5PR07MB1301.eurprd07.prod.outlook.com (10.164.41.155) with Microsoft SMTP Server (TLS) id 15.1.274.16 via Mailbox Transport; Sun, 20 Sep 2015 17:02:22 +0000 Authentication-Results: linutronix.de; dkim=none (message not signed) header.d=none;linutronix.de; dmarc=none action=none header.from=numascale.com; Received: from localhost.localdomain (175.156.157.249) by AM4PR07MB1298.eurprd07.prod.outlook.com (10.164.81.156) with Microsoft SMTP Server (TLS) id 15.1.274.16; Sun, 20 Sep 2015 17:02:17 +0000 From: Daniel J Blueman To: Thomas Gleixner , Ingo Molnar , "H. Peter Anvin" CC: Daniel J Blueman , , , Daniel Lezcano , Steffen Persvold Subject: [PATCH 1/4] x86: Cleanup Numachip support Date: Mon, 21 Sep 2015 01:01:59 +0800 Message-ID: <1442768522-19217-1-git-send-email-daniel@numascale.com> X-Mailer: git-send-email 2.5.0 Content-Type: text/plain X-MS-Exchange-Organization-Network-Message-Id: fe400868-3199-4172-298d-08d2c1dd3f4e X-MS-Exchange-Organization-AuthSource: AM4PR07MB1298.eurprd07.prod.outlook.com X-MS-Exchange-Organization-AuthAs: Internal X-MS-Exchange-Organization-AuthMechanism: 06 X-Originating-IP: [175.156.157.249] X-ClientProxiedBy: DB5PR03CA0064.eurprd03.prod.outlook.com (25.164.34.32) To AM4PR07MB1298.eurprd07.prod.outlook.com (25.164.81.156) Return-Path: daniel@numascale.com X-Microsoft-Exchange-Diagnostics: 1;AM4PR07MB1298;2:SuESjY87hncZK5oetlKBUgd5+A52q+8ISkbmyNEYs4sIN/2VAMq0+L1TTSIAIc0vcTILJahG9FKN/ukuYo2fPpZQwkjcThbiAYNDdCET7gpK5qjn/x7EwUfs+c7klMFt/ZC4O4rXWR1cjwKeeriSkvp9j6NE0U1W9hz3EhSTWlc=;3:u8XrDSzqHnU4xr9WqJF/QPiaVDFe6EsN/W2fms86yCt3w9JRetJybEg1ciZLMgAia9lraO8Gi5UGLfE1Pw9p1upmKDY+Dhdrqv7BqnsooEL+0karVyxni6lC8WpbWPqdwsFs6n1BcNOxBMB6RB9bIg==;25:LlfaRKk/7+qAC5MEPmzZoY5A3+VFYQumvnxwlU6R/U0GkLoIjuKk4RW0gvoquOwlMVtkzipmZM5VeEaXBQqsSgMurE8sIl/QN7FIlJviST32chgpfnP8Evf6+IkvBGa5yDC98WVJSc7tevoDjbd1iMVGw2rLzN29I4QlRLbY6Z7CQoSoZ0O3p4RlewxQZjhQqOgxvwE4mFzvnHEyyxlIMvoQzT1GhU4Ada98QGm6zFbICt0sKuciKhonDXELxuxT;4:nMFNIiWHKKVdOqrm9Qffm+mM/7UoZKmfdlzssgWlm0e6iTzhgzPAf+Ld6lz7bf9w/5MMej1x+pqCEthw4zQaKRLsxmRbC5pmhwHJ4a3BfBpybw+3E+s1JRA3kpr8f9MXptyCRkrYBgP52LYgeLFTUcvpdD1rJ0BhfUMnhTN1srpciUHo6TjHKEPbJm0njpVWE6vlHntELE7UfKe0nI2/x5v1zzeZWJ+2m2ysfxeCWC0= X-Microsoft-Antispam: UriScan:;BCL:0;PCL:0;RULEID:;SRVR:AM4PR07MB1298; X-MS-Exchange-Organization-AVStamp-Service: 1.0 X-Exchange-Antispam-Report-CFA: BCL:0;PCL:0;RULEID:;SRVR:AM4PR07MB1298;BCL:0;PCL:0;RULEID:;SRVR:AM4PR07MB1298; X-Forefront-Antispam-Report: SFV:SKI;SFS:;DIR:INB;SFP:;SCL:-1;SRVR:AM4PR07MB1298;H:localhost.localdomain;FPR:;SPF:None;LANG:en; X-MS-Exchange-Organization-SCL: -1 X-Microsoft-Exchange-Diagnostics: 1;AM4PR07MB1298;23:MumMDiJ2mI6l2GgMG8Sysh65rcsDQ7afJEdGC4/1uq6liziLcyiVJZsQfcoassKPcTBrVgd7BxONb9BdL2nUKa6AzlMl6o3AKQ7X+NQ5+ifHtH6Zl/jcnoV56jRAWBCSkoqYIIrw0dXCfZjxIIea7wMCZtXKX5Xk7qhnqSgwRRyvyM1Hdsy4MbOCySaeunyD;5:yiZ7DSACGKl8tVhAlAeOSO0CQlyx3IUnsNrazMKDVZHMUCUiIC+QQwy8h02QhHsYQzQ1SXKhg0ddtG+E5KCZk4CjKHUX6slxkH3eOpDCZEMxCgnKd9qIQ5m3B4lYZchxtE7KQNFK3XDe+zlJ4FZm4A==;24:eOV7u5PuFEJcm8LEkGMhXWvKjxcaXodf9fnYSVCGs55gtrnKKs1k12zFnaTEh3ocqVIMRRtHe8Ekfr0laOydlj03PwXwddqlAq/Zha1nwWM=;20:pWrqzRIJQo6LeyuUA1CNcjQr4syg+kMkNu+fpYxmv4m8AsXTwDYbbGND9vH7VmXKdDsTFSAU6rQfvMx8sqts8A== X-MS-Exchange-CrossTenant-OriginalArrivalTime: 20 Sep 2015 17:02:17.6368 (UTC) X-MS-Exchange-CrossTenant-FromEntityHeader: Hosted X-MS-Exchange-Transport-CrossTenantHeadersStamped: AM4PR07MB1298 X-MS-Exchange-Organization-MessageDirectionality: Originating X-MS-Exchange-Transport-EndToEndLatency: 00:00:04.6865475 Drop unused code and includes in Numachip header files and APIC driver. Additionally, use the 'numachip1' prefix on Numachip1-specific functions; this prepares for adding Numachip2 support in later patches. Signed-off-by: Daniel J Blueman Acked-by: Steffen Persvold --- arch/x86/include/asm/numachip/numachip_csr.h | 118 +-------------------------- arch/x86/kernel/apic/apic_numachip.c | 103 ++++++++++------------- 2 files changed, 43 insertions(+), 178 deletions(-) diff --git a/arch/x86/include/asm/numachip/numachip_csr.h b/arch/x86/include/asm/numachip/numachip_csr.h index 660f843..7469b13 100644 --- a/arch/x86/include/asm/numachip/numachip_csr.h +++ b/arch/x86/include/asm/numachip/numachip_csr.h @@ -14,12 +14,7 @@ #ifndef _ASM_X86_NUMACHIP_NUMACHIP_CSR_H #define _ASM_X86_NUMACHIP_NUMACHIP_CSR_H -#include -#include #include -#include -#include -#include #define CSR_NODE_SHIFT 16 #define CSR_NODE_BITS(p) (((unsigned long)(p)) << CSR_NODE_SHIFT) @@ -27,11 +22,8 @@ /* 32K CSR space, b15 indicates geo/non-geo */ #define CSR_OFFSET_MASK 0x7fffUL - -/* Global CSR space covers all 4K possible nodes with 64K CSR space per node */ -#define NUMACHIP_GCSR_BASE 0x3fff00000000ULL -#define NUMACHIP_GCSR_LIM 0x3fff0fffffffULL -#define NUMACHIP_GCSR_SIZE (NUMACHIP_GCSR_LIM - NUMACHIP_GCSR_BASE + 1) +#define CSR_G0_NODE_IDS (0x008 + (0 << 12)) +#define CSR_G3_EXT_IRQ_GEN (0x030 + (3 << 12)) /* * Local CSR space starts in global CSR space with "nodeid" = 0xfff0, however @@ -42,28 +34,12 @@ #define NUMACHIP_LCSR_LIM 0x3fffffffffffULL #define NUMACHIP_LCSR_SIZE (NUMACHIP_LCSR_LIM - NUMACHIP_LCSR_BASE + 1) -static inline void *gcsr_address(int node, unsigned long offset) -{ - return __va(NUMACHIP_GCSR_BASE | (1UL << 15) | - CSR_NODE_BITS(node & CSR_NODE_MASK) | (offset & CSR_OFFSET_MASK)); -} - static inline void *lcsr_address(unsigned long offset) { return __va(NUMACHIP_LCSR_BASE | (1UL << 15) | CSR_NODE_BITS(0xfff0) | (offset & CSR_OFFSET_MASK)); } -static inline unsigned int read_gcsr(int node, unsigned long offset) -{ - return swab32(readl(gcsr_address(node, offset))); -} - -static inline void write_gcsr(int node, unsigned long offset, unsigned int val) -{ - writel(swab32(val), gcsr_address(node, offset)); -} - static inline unsigned int read_lcsr(unsigned long offset) { return swab32(readl(lcsr_address(offset))); @@ -74,94 +50,4 @@ static inline void write_lcsr(unsigned long offset, unsigned int val) writel(swab32(val), lcsr_address(offset)); } -/* ========================================================================= */ -/* CSR_G0_STATE_CLEAR */ -/* ========================================================================= */ - -#define CSR_G0_STATE_CLEAR (0x000 + (0 << 12)) -union numachip_csr_g0_state_clear { - unsigned int v; - struct numachip_csr_g0_state_clear_s { - unsigned int _state:2; - unsigned int _rsvd_2_6:5; - unsigned int _lost:1; - unsigned int _rsvd_8_31:24; - } s; -}; - -/* ========================================================================= */ -/* CSR_G0_NODE_IDS */ -/* ========================================================================= */ - -#define CSR_G0_NODE_IDS (0x008 + (0 << 12)) -union numachip_csr_g0_node_ids { - unsigned int v; - struct numachip_csr_g0_node_ids_s { - unsigned int _initialid:16; - unsigned int _nodeid:12; - unsigned int _rsvd_28_31:4; - } s; -}; - -/* ========================================================================= */ -/* CSR_G3_EXT_IRQ_GEN */ -/* ========================================================================= */ - -#define CSR_G3_EXT_IRQ_GEN (0x030 + (3 << 12)) -union numachip_csr_g3_ext_irq_gen { - unsigned int v; - struct numachip_csr_g3_ext_irq_gen_s { - unsigned int _vector:8; - unsigned int _msgtype:3; - unsigned int _index:5; - unsigned int _destination_apic_id:16; - } s; -}; - -/* ========================================================================= */ -/* CSR_G3_EXT_IRQ_STATUS */ -/* ========================================================================= */ - -#define CSR_G3_EXT_IRQ_STATUS (0x034 + (3 << 12)) -union numachip_csr_g3_ext_irq_status { - unsigned int v; - struct numachip_csr_g3_ext_irq_status_s { - unsigned int _result:32; - } s; -}; - -/* ========================================================================= */ -/* CSR_G3_EXT_IRQ_DEST */ -/* ========================================================================= */ - -#define CSR_G3_EXT_IRQ_DEST (0x038 + (3 << 12)) -union numachip_csr_g3_ext_irq_dest { - unsigned int v; - struct numachip_csr_g3_ext_irq_dest_s { - unsigned int _irq:8; - unsigned int _rsvd_8_31:24; - } s; -}; - -/* ========================================================================= */ -/* CSR_G3_NC_ATT_MAP_SELECT */ -/* ========================================================================= */ - -#define CSR_G3_NC_ATT_MAP_SELECT (0x7fc + (3 << 12)) -union numachip_csr_g3_nc_att_map_select { - unsigned int v; - struct numachip_csr_g3_nc_att_map_select_s { - unsigned int _upper_address_bits:4; - unsigned int _select_ram:4; - unsigned int _rsvd_8_31:24; - } s; -}; - -/* ========================================================================= */ -/* CSR_G3_NC_ATT_MAP_SELECT_0-255 */ -/* ========================================================================= */ - -#define CSR_G3_NC_ATT_MAP_SELECT_0 (0x800 + (3 << 12)) - #endif /* _ASM_X86_NUMACHIP_NUMACHIP_CSR_H */ - diff --git a/arch/x86/kernel/apic/apic_numachip.c b/arch/x86/kernel/apic/apic_numachip.c index b548fd3..8729249 100644 --- a/arch/x86/kernel/apic/apic_numachip.c +++ b/arch/x86/kernel/apic/apic_numachip.c @@ -11,30 +11,20 @@ * */ -#include -#include -#include -#include -#include -#include -#include #include -#include -#include #include #include -#include -#include #include #include #include +#include -static int numachip_system __read_mostly; +u8 numachip_system __read_mostly; +static const struct apic apic_numachip1; +static void (*numachip_apic_icr_write)(int apicid, unsigned int val) __read_mostly; -static const struct apic apic_numachip; - -static unsigned int get_apic_id(unsigned long x) +static unsigned int numachip1_get_apic_id(unsigned long x) { unsigned long value; unsigned int id = (x >> 24) & 0xff; @@ -47,7 +37,7 @@ static unsigned int get_apic_id(unsigned long x) return id; } -static unsigned long set_apic_id(unsigned int id) +static unsigned long numachip1_set_apic_id(unsigned int id) { unsigned long x; @@ -55,11 +45,6 @@ static unsigned long set_apic_id(unsigned int id) return x; } -static unsigned int read_xapic_id(void) -{ - return get_apic_id(apic_read(APIC_ID)); -} - static int numachip_apic_id_valid(int apicid) { /* Trust what bootloader passes in MADT */ @@ -68,7 +53,7 @@ static int numachip_apic_id_valid(int apicid) static int numachip_apic_id_registered(void) { - return physid_isset(read_xapic_id(), phys_cpu_present_map); + return 1; } static int numachip_phys_pkg_id(int initial_apic_id, int index_msb) @@ -76,36 +61,27 @@ static int numachip_phys_pkg_id(int initial_apic_id, int index_msb) return initial_apic_id >> index_msb; } -static int numachip_wakeup_secondary(int phys_apicid, unsigned long start_rip) +static void numachip1_apic_icr_write(int apicid, unsigned int val) { - union numachip_csr_g3_ext_irq_gen int_gen; - - int_gen.s._destination_apic_id = phys_apicid; - int_gen.s._vector = 0; - int_gen.s._msgtype = APIC_DM_INIT >> 8; - int_gen.s._index = 0; - - write_lcsr(CSR_G3_EXT_IRQ_GEN, int_gen.v); - - int_gen.s._msgtype = APIC_DM_STARTUP >> 8; - int_gen.s._vector = start_rip >> 12; + write_lcsr(CSR_G3_EXT_IRQ_GEN, (apicid << 16) | val); +} - write_lcsr(CSR_G3_EXT_IRQ_GEN, int_gen.v); +static int numachip_wakeup_secondary(int phys_apicid, unsigned long start_rip) +{ + numachip_apic_icr_write(phys_apicid, APIC_DM_INIT); + numachip_apic_icr_write(phys_apicid, APIC_DM_STARTUP | + (start_rip >> 12)); return 0; } static void numachip_send_IPI_one(int cpu, int vector) { - union numachip_csr_g3_ext_irq_gen int_gen; int apicid = per_cpu(x86_cpu_to_apicid, cpu); + unsigned int dmode; - int_gen.s._destination_apic_id = apicid; - int_gen.s._vector = vector; - int_gen.s._msgtype = (vector == NMI_VECTOR ? APIC_DM_NMI : APIC_DM_FIXED) >> 8; - int_gen.s._index = 0; - - write_lcsr(CSR_G3_EXT_IRQ_GEN, int_gen.v); + dmode = (vector == NMI_VECTOR) ? APIC_DM_NMI : APIC_DM_FIXED; + numachip_apic_icr_write(apicid, dmode | vector); } static void numachip_send_IPI_mask(const struct cpumask *mask, int vector) @@ -149,9 +124,9 @@ static void numachip_send_IPI_self(int vector) apic_write(APIC_SELF_IPI, vector); } -static int __init numachip_probe(void) +static int __init numachip1_probe(void) { - return apic == &apic_numachip; + return apic == &apic_numachip1; } static void fixup_cpu_id(struct cpuinfo_x86 *c, int node) @@ -172,34 +147,38 @@ static void fixup_cpu_id(struct cpuinfo_x86 *c, int node) static int __init numachip_system_init(void) { - if (!numachip_system) + /* Map the LCSR area and set up the apic_icr_write function */ + switch (numachip_system) { + case 1: + init_extra_mapping_uc(NUMACHIP_LCSR_BASE, NUMACHIP_LCSR_SIZE); + numachip_apic_icr_write = numachip1_apic_icr_write; + x86_init.pci.arch_init = pci_numachip_init; + break; + default: return 0; - - init_extra_mapping_uc(NUMACHIP_LCSR_BASE, NUMACHIP_LCSR_SIZE); - init_extra_mapping_uc(NUMACHIP_GCSR_BASE, NUMACHIP_GCSR_SIZE); + } x86_cpuinit.fixup_cpu_id = fixup_cpu_id; - x86_init.pci.arch_init = pci_numachip_init; return 0; } early_initcall(numachip_system_init); -static int numachip_acpi_madt_oem_check(char *oem_id, char *oem_table_id) +static int numachip1_acpi_madt_oem_check(char *oem_id, char *oem_table_id) { - if (!strncmp(oem_id, "NUMASC", 6)) { - numachip_system = 1; - return 1; - } + if ((strncmp(oem_id, "NUMASC", 6) != 0) || + (strncmp(oem_table_id, "NCONNECT", 8) != 0)) + return 0; - return 0; -} + numachip_system = 1; -static const struct apic apic_numachip __refconst = { + return 1; +} +static const struct apic apic_numachip1 __refconst = { .name = "NumaConnect system", - .probe = numachip_probe, - .acpi_madt_oem_check = numachip_acpi_madt_oem_check, + .probe = numachip1_probe, + .acpi_madt_oem_check = numachip1_acpi_madt_oem_check, .apic_id_valid = numachip_apic_id_valid, .apic_id_registered = numachip_apic_id_registered, @@ -221,8 +200,8 @@ static const struct apic apic_numachip __refconst = { .check_phys_apicid_present = default_check_phys_apicid_present, .phys_pkg_id = numachip_phys_pkg_id, - .get_apic_id = get_apic_id, - .set_apic_id = set_apic_id, + .get_apic_id = numachip1_get_apic_id, + .set_apic_id = numachip1_set_apic_id, .apic_id_mask = 0xffU << 24, .cpu_mask_to_apicid_and = default_cpu_mask_to_apicid_and, @@ -244,5 +223,5 @@ static const struct apic apic_numachip __refconst = { .wait_icr_idle = native_apic_wait_icr_idle, .safe_wait_icr_idle = native_safe_apic_wait_icr_idle, }; -apic_driver(apic_numachip); +apic_driver(apic_numachip1); -- 2.5.0