diff --git a/drivers/edac/mce_amd.c b/drivers/edac/mce_amd.c
index daaac2c..9a134c9 100644
--- a/drivers/edac/mce_amd.c
+++ b/drivers/edac/mce_amd.c
@@ -451,7 +451,7 @@ static void decode_mc0_mce(struct mce *m)
 	u16 ec = EC(m->status);
 	u8 xec = XEC(m->status, xec_mask);
 
-	pr_emerg(HW_ERR "MC0 Error: ");
+	pr_crit(HW_ERR "MC0 Error: ");
 
 	/* TLB error signatures are the same across families */
 	if (TLB_ERROR(ec)) {
@@ -464,7 +464,7 @@ static void decode_mc0_mce(struct mce *m)
 	} else if (fam_ops->mc0_mce(ec, xec))
 		;
 	else
-		pr_emerg(HW_ERR "Corrupted MC0 MCE info?\n");
+		pr_crit(HW_ERR "Corrupted MC0 MCE info?\n");
 }
 
 static bool k8_mc1_mce(u16 ec, u8 xec)
@@ -561,7 +561,7 @@ static void decode_mc1_mce(struct mce *m)
 	u16 ec = EC(m->status);
 	u8 xec = XEC(m->status, xec_mask);
 
-	pr_emerg(HW_ERR "MC1 Error: ");
+	pr_crit(HW_ERR "MC1 Error: ");
 
 	if (TLB_ERROR(ec))
 		pr_cont("%s TLB %s.\n", LL_MSG(ec),
@@ -583,7 +583,7 @@ static void decode_mc1_mce(struct mce *m)
 	return;
 
 wrong_mc1_mce:
-	pr_emerg(HW_ERR "Corrupted MC1 MCE info?\n");
+	pr_crit(HW_ERR "Corrupted MC1 MCE info?\n");
 }
 
 static bool k8_mc2_mce(u16 ec, u8 xec)
@@ -707,7 +707,7 @@ static void decode_mc2_mce(struct mce *m)
 	u16 ec = EC(m->status);
 	u8 xec = XEC(m->status, xec_mask);
 
-	pr_emerg(HW_ERR "MC2 Error: ");
+	pr_crit(HW_ERR "MC2 Error: ");
 
 	if (!fam_ops->mc2_mce(ec, xec))
 		pr_cont(HW_ERR "Corrupted MC2 MCE info?\n");
@@ -719,12 +719,12 @@ static void decode_mc3_mce(struct mce *m)
 	u8 xec = XEC(m->status, xec_mask);
 
 	if (boot_cpu_data.x86 >= 0x14) {
-		pr_emerg("You shouldn't be seeing MC3 MCE on this cpu family,"
+		pr_crit("You shouldn't be seeing MC3 MCE on this cpu family,"
 			 " please report on LKML.\n");
 		return;
 	}
 
-	pr_emerg(HW_ERR "MC3 Error");
+	pr_crit(HW_ERR "MC3 Error");
 
 	if (xec == 0x0) {
 		u8 r4 = R4(ec);
@@ -739,7 +739,7 @@ static void decode_mc3_mce(struct mce *m)
 	return;
 
  wrong_mc3_mce:
-	pr_emerg(HW_ERR "Corrupted MC3 MCE info?\n");
+	pr_crit(HW_ERR "Corrupted MC3 MCE info?\n");
 }
 
 static void decode_mc4_mce(struct mce *m)
@@ -750,7 +750,7 @@ static void decode_mc4_mce(struct mce *m)
 	u8 xec = XEC(m->status, 0x1f);
 	u8 offset = 0;
 
-	pr_emerg(HW_ERR "MC4 Error (node %d): ", node_id);
+	pr_crit(HW_ERR "MC4 Error (node %d): ", node_id);
 
 	switch (xec) {
 	case 0x0 ... 0xe:
@@ -797,7 +797,7 @@ static void decode_mc4_mce(struct mce *m)
 	return;
 
  wrong_mc4_mce:
-	pr_emerg(HW_ERR "Corrupted MC4 MCE info?\n");
+	pr_crit(HW_ERR "Corrupted MC4 MCE info?\n");
 }
 
 static void decode_mc5_mce(struct mce *m)
@@ -809,7 +809,7 @@ static void decode_mc5_mce(struct mce *m)
 	if (c->x86 == 0xf || c->x86 == 0x11)
 		goto wrong_mc5_mce;
 
-	pr_emerg(HW_ERR "MC5 Error: ");
+	pr_crit(HW_ERR "MC5 Error: ");
 
 	if (INT_ERROR(ec)) {
 		if (xec <= 0x1f) {
@@ -829,14 +829,14 @@ static void decode_mc5_mce(struct mce *m)
 	return;
 
  wrong_mc5_mce:
-	pr_emerg(HW_ERR "Corrupted MC5 MCE info?\n");
+	pr_crit(HW_ERR "Corrupted MC5 MCE info?\n");
 }
 
 static void decode_mc6_mce(struct mce *m)
 {
 	u8 xec = XEC(m->status, xec_mask);
 
-	pr_emerg(HW_ERR "MC6 Error: ");
+	pr_crit(HW_ERR "MC6 Error: ");
 
 	if (xec > 0x5)
 		goto wrong_mc6_mce;
@@ -882,11 +882,11 @@ static void decode_smca_errors(struct mce *m)
 static inline void amd_decode_err_code(u16 ec)
 {
 	if (INT_ERROR(ec)) {
-		pr_emerg(HW_ERR "internal: %s\n", UU_MSG(ec));
+		pr_crit(HW_ERR "internal: %s\n", UU_MSG(ec));
 		return;
 	}
 
-	pr_emerg(HW_ERR "cache level: %s", LL_MSG(ec));
+	pr_crit(HW_ERR "cache level: %s", LL_MSG(ec));
 
 	if (BUS_ERROR(ec))
 		pr_cont(", mem/io: %s", II_MSG(ec));
@@ -944,9 +944,9 @@ int amd_decode_mce(struct notifier_block *nb, unsigned long val, void *data)
 	if (amd_filter_mce(m))
 		return NOTIFY_STOP;
 
-	pr_emerg(HW_ERR "%s\n", decode_error_status(m));
+	pr_crit(HW_ERR "%s\n", decode_error_status(m));
 
-	pr_emerg(HW_ERR "CPU:%d (%x:%x:%x) MC%d_STATUS[%s|%s|%s|%s|%s",
+	pr_crit(HW_ERR "CPU:%d (%x:%x:%x) MC%d_STATUS[%s|%s|%s|%s|%s",
 		m->extcpu,
 		c->x86, c->x86_model, c->x86_mask,
 		m->bank,
@@ -981,7 +981,7 @@ int amd_decode_mce(struct notifier_block *nb, unsigned long val, void *data)
 	pr_cont("]: 0x%016llx\n", m->status);
 
 	if (m->status & MCI_STATUS_ADDRV)
-		pr_emerg(HW_ERR "Error Addr: 0x%016llx\n", m->addr);
+		pr_crit(HW_ERR "Error Addr: 0x%016llx\n", m->addr);
 
 	if (boot_cpu_has(X86_FEATURE_SMCA)) {
 		if (m->status & MCI_STATUS_SYNDV)